| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add sample image processing module to Spartan 6 demo project | Timothy Pearson | 2013-04-17 | 1 | -5/+72 |
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| * | Properly report device programming errors | Timothy Pearson | 2013-04-15 | 1 | -0/+11 |
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| * | Avoid usage of TQTimer::singleShot in the FPGA viewer part | Timothy Pearson | 2013-03-13 | 1 | -1/+1 |
| | | | | | Repair "think-o" in the Spartan 6 block RAM HDL | ||||
| * | Add sample design for Spartan 6 and ISE 14.4 | Timothy Pearson | 2013-03-13 | 8 | -3/+615 |
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| * | Update remote debug module and clean up FPGA section of the source tree | Timothy Pearson | 2013-03-13 | 3 | -2364/+3 |
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| * | Add verified Xilinx programming script and device type extractor | Timothy Pearson | 2012-11-20 | 3 | -1/+107 |
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| * | Minor cleanup | Timothy Pearson | 2012-11-20 | 1 | -10/+11 |
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| * | Add magic 64 bytes to S6 svf file | Timothy Pearson | 2012-11-20 | 2 | -2/+27 |
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| * | Add initial untested support for Spartan 6 devices | Timothy Pearson | 2012-11-20 | 2 | -1/+84 |
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| * | Initial rpi jtag support | Timothy Pearson | 2012-10-04 | 1 | -106/+93 |
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| * | Update makefiles | Timothy Pearson | 2012-10-02 | 2 | -4/+58 |
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| * | Add initial files for direct FPGA programming | Timothy Pearson | 2012-10-01 | 96 | -0/+26114 |
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| * | Add public domain FPGA files for Xilinx s3/s3e | Timothy Pearson | 2012-05-14 | 2 | -0/+2364 |
