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authorTimothy Pearson <kb9vqf@pearsoncomputing.net>2012-10-01 21:07:55 -0500
committerTimothy Pearson <kb9vqf@pearsoncomputing.net>2012-10-01 21:07:55 -0500
commitd1b70f80180fe4b5ac6078e2be9678fc36d74c5c (patch)
tree2e46de7a644f89e36842247af6826ff00a0d3fa4 /fpga/xilinx/programmer/bit2svf/bitinfo-0.3/Changelog
parentae161b4a6a978922747cf09e8c04479340825852 (diff)
downloadulab-d1b70f80180fe4b5ac6078e2be9678fc36d74c5c.tar.gz
ulab-d1b70f80180fe4b5ac6078e2be9678fc36d74c5c.zip
Add initial files for direct FPGA programming
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+2002-09-10, version 0.2
+
+Updated the way I parse the bitstream length according to information in the
+online FPGA FAQ. Special thanks to "Stephen from Australia" for setting me
+straight. Started using version numbers. If you have an unnumbered
+version of bitinfo, it is version 0.1 and out of date.