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| author | Timothy Pearson <kb9vqf@pearsoncomputing.net> | 2014-01-10 23:15:55 -0600 |
|---|---|---|
| committer | Timothy Pearson <kb9vqf@pearsoncomputing.net> | 2014-01-10 23:15:55 -0600 |
| commit | 32b7b87d3dcd0d0f780fdfa8d5c2859bda8b175a (patch) | |
| tree | f20a5f1b61c071752cde0c4fb07dd452da713e2d /servers/fpga_server_lin/src/bbb-gpmc-init.cpp | |
| parent | 0ffb793cb56ec10a43ae241299b347bc4fef7b5c (diff) | |
| download | ulab-32b7b87d3dcd0d0f780fdfa8d5c2859bda8b175a.tar.gz ulab-32b7b87d3dcd0d0f780fdfa8d5c2859bda8b175a.zip | |
Lower the uLab FPGA viewer GPMC clock to reduce errors on prototype lashup
Add memory stress tests to GPMC test program
Diffstat (limited to 'servers/fpga_server_lin/src/bbb-gpmc-init.cpp')
| -rw-r--r-- | servers/fpga_server_lin/src/bbb-gpmc-init.cpp | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/servers/fpga_server_lin/src/bbb-gpmc-init.cpp b/servers/fpga_server_lin/src/bbb-gpmc-init.cpp index 961c560..be495a3 100644 --- a/servers/fpga_server_lin/src/bbb-gpmc-init.cpp +++ b/servers/fpga_server_lin/src/bbb-gpmc-init.cpp @@ -106,12 +106,22 @@ void gpmc_setup(void) { // disable before playing with the registers *(gpmc + displacement + GPMC_CONFIG7) = 0x00000000; +// *(gpmc + displacement + GPMC_CONFIG) = 0x00000000; // Unlimited address space +// *(gpmc + displacement + GPMC_CONFIG1) = 0x00000000; // No burst, async, 8-bit, non multiplexed +// *(gpmc + displacement + GPMC_CONFIG2) = 0x00001000; // Assert CS on fclk0, deassert CS on fclk16 +// *(gpmc + displacement + GPMC_CONFIG3) = 0x00000400; // Assert ADV on fclk 0, deassert ADV on fclk 4 +// *(gpmc + displacement + GPMC_CONFIG4) = 0x0c041004; // Assert WE on fclk4, deassert WE on fclk12, assert OE on fclk4, deassert OE on fclk16 +// *(gpmc + displacement + GPMC_CONFIG5) = 0x000c1010; // Data valid on fclk 12, cycle time 16 fclks +// *(gpmc + displacement + GPMC_CONFIG6) = 0x00000000; // No back to back cycle restrictions +// *(gpmc + displacement + GPMC_CONFIG7) = 0x00000e50; // CS0: Set base address 0x10000000, 32MB region, and enable CS + + // Use slower clocking to reduce errors in wire nest prototype *(gpmc + displacement + GPMC_CONFIG) = 0x00000000; // Unlimited address space *(gpmc + displacement + GPMC_CONFIG1) = 0x00000000; // No burst, async, 8-bit, non multiplexed - *(gpmc + displacement + GPMC_CONFIG2) = 0x00001000; // Assert CS on fclk0, deassert CS on fclk16 + *(gpmc + displacement + GPMC_CONFIG2) = 0x00001f00; // Assert CS on fclk0, deassert CS on fclk31 *(gpmc + displacement + GPMC_CONFIG3) = 0x00000400; // Assert ADV on fclk 0, deassert ADV on fclk 4 - *(gpmc + displacement + GPMC_CONFIG4) = 0x0c041004; // Assert WE on fclk4, deassert WE on fclk12, assert OE on fclk4, deassert OE on fclk16 - *(gpmc + displacement + GPMC_CONFIG5) = 0x000c1010; // Data valid on fclk 12, cycle time 16 fclks + *(gpmc + displacement + GPMC_CONFIG4) = 0x1f041f04; // Assert WE on fclk4, deassert WE on fclk31, assert OE on fclk4, deassert OE on fclk31 + *(gpmc + displacement + GPMC_CONFIG5) = 0x00101f1f; // Data valid on fclk 16, cycle time 31 fclks *(gpmc + displacement + GPMC_CONFIG6) = 0x00000000; // No back to back cycle restrictions *(gpmc + displacement + GPMC_CONFIG7) = 0x00000e50; // CS0: Set base address 0x10000000, 32MB region, and enable CS |