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-rw-r--r--fpga/common/remote_access.v53
1 files changed, 40 insertions, 13 deletions
diff --git a/fpga/common/remote_access.v b/fpga/common/remote_access.v
index 1482cfb..c323097 100644
--- a/fpga/common/remote_access.v
+++ b/fpga/common/remote_access.v
@@ -38,7 +38,7 @@ module remote_access(
input sram_wren_in,
input sram_clock_in,
input [7:0] sram_data_in,
- input [13:0] sram_address_in,
+ input [(RAM_ADDR_BITS-1):0] sram_address_in,
output [7:0] sram_data_out,
output sram_available,
input sram_processing_done,
@@ -56,7 +56,6 @@ module remote_access(
reg [7:0] remote_access_4_bit_input_reg;
reg [7:0] remote_access_8_bit_input_reg;
reg [15:0] remote_access_16_bit_input_reg;
- reg [15:0] remote_access_data_ram_size_reg = (2**RAM_ADDR_BITS);
reg [3:0] remote_access_lcd_data_out_reg;
reg remote_access_lcd_rs_out_reg;
reg remote_access_lcd_rw_out_reg;
@@ -192,12 +191,12 @@ module remote_access(
reg data_storage_remote_enable = 0;
wire data_storage_clka;
wire [7:0] data_storage_dina;
- wire [13:0] data_storage_addra;
+ wire [(RAM_ADDR_BITS-1):0] data_storage_addra;
wire data_storage_write_enable;
wire [7:0] data_storage_data_out;
reg [7:0] data_storage_dina_reg;
- reg [13:0] data_storage_addra_reg;
+ reg [(RAM_ADDR_BITS-1):0] data_storage_addra_reg;
reg data_storage_write_enable_reg;
data_storage #(RAM_ADDR_BITS) data_storage(.clka(data_storage_clka), .dina(data_storage_dina), .addra(data_storage_addra),
@@ -251,6 +250,9 @@ module remote_access(
reg transmit_main_status = 0;
reg transmit_main_status_done = 0;
+
+ reg transmit_dsp_ram_size = 0;
+ reg transmit_dsp_ram_size_done = 0;
reg transmit_input_status = 0;
reg transmit_input_status_done = 0;
@@ -267,7 +269,7 @@ module remote_access(
reg transmit_dsp_status = 0;
reg transmit_dsp_status_done = 0;
reg transmit_dsp_status_holdoff = 0;
- reg [15:0] transmit_dsp_status_counter = 0;
+ reg [RAM_ADDR_BITS:0] transmit_dsp_status_counter = 0;
reg transmit_led_status = 0;
reg transmit_led_status_done = 0;
@@ -294,7 +296,7 @@ module remote_access(
if (tx_toggle == 0) begin
if ((transmit_4_bit_status == 1) && (transmit_4_bit_status_done == 0)) begin
TxD_data = transmitter_4_bit_state;
-
+
TxD_start = 1;
tx_toggle = 1;
@@ -303,7 +305,7 @@ module remote_access(
if ((transmit_8_bit_status == 1) && (transmit_8_bit_status_done == 0)) begin
TxD_data = transmitter_8_bit_state;
-
+
TxD_start = 1;
tx_toggle = 1;
@@ -330,16 +332,25 @@ module remote_access(
if ((transmit_main_status == 1) && (transmit_main_status_done == 0)) begin
TxD_data = transmitter_main_state;
-
+
TxD_start = 1;
tx_toggle = 1;
transmit_main_status_done = 1;
end
+
+ if ((transmit_dsp_ram_size == 1) && (transmit_dsp_ram_size_done == 0)) begin
+ TxD_data = RAM_ADDR_BITS;
+
+ TxD_start = 1;
+ tx_toggle = 1;
+
+ transmit_dsp_ram_size_done = 1;
+ end
if ((transmit_input_status == 1) && (transmit_input_status_done == 0)) begin
TxD_data = transmitter_input_state;
-
+
TxD_start = 1;
tx_toggle = 1;
@@ -348,7 +359,7 @@ module remote_access(
if ((transmit_lcd_status == 1) && (transmit_lcd_status_done == 0)) begin
TxD_data = lcd_display_string[transmit_lcd_status_counter];
-
+
TxD_start = 1;
tx_toggle = 1;
@@ -360,7 +371,7 @@ module remote_access(
if ((transmit_led_status == 1) && (transmit_led_status_done == 0)) begin
TxD_data = led_display_bytes[transmit_led_status_counter];
-
+
TxD_start = 1;
tx_toggle = 1;
@@ -396,7 +407,7 @@ module remote_access(
if (transmit_dsp_status_counter >= (2**RAM_ADDR_BITS)) begin
transmit_dsp_status_done = 1;
data_storage_write_enable_reg = 1'bz;
- data_storage_addra_reg = 14'bz;
+ data_storage_addra_reg = {(RAM_ADDR_BITS){1'bz}};
end
end
end
@@ -424,6 +435,10 @@ module remote_access(
if (transmit_main_status == 0) begin
transmit_main_status_done = 0;
end
+
+ if (transmit_dsp_ram_size == 0) begin
+ transmit_dsp_ram_size_done = 0;
+ end
if (transmit_input_status == 0) begin
transmit_input_status_done = 0;
@@ -528,6 +543,13 @@ module remote_access(
if (transmit_main_status_done == 1) begin
transmit_main_status = 0;
if (transmit_all_data_state == 1) begin
+ transmit_dsp_ram_size = 1;
+ end
+ end
+
+ if (transmit_dsp_ram_size_done == 1) begin
+ transmit_dsp_ram_size = 0;
+ if (transmit_all_data_state == 1) begin
transmit_4_bit_status = 1;
end
end
@@ -599,7 +621,7 @@ module remote_access(
data_storage_remote_enable = 0;
sram_available_reg = 1;
data_storage_write_enable_reg = 1'bz;
- data_storage_addra_reg = 14'bz;
+ data_storage_addra_reg = {(RAM_ADDR_BITS){1'bz}};
waiting_on_dsp_processing = 1;
transmit_dsp_rx_complete = 1;
next_byte_is_command_prev_command = 0;
@@ -698,6 +720,11 @@ module remote_access(
// Transmit the contents of RAM...
transmit_dsp_status = 1;
end
+
+ if (serial_command_buffer == 79) begin
+ // Transmit the DSP RAM size
+ transmit_dsp_ram_size = 1;
+ end
end else begin
if (next_byte_is_command == 1) begin
// The previous byte was the command--now load in the data!