diff options
Diffstat (limited to 'servers/fpga_server_lin/src')
| -rw-r--r-- | servers/fpga_server_lin/src/bbb-gpmc-init.cpp | 16 | ||||
| -rw-r--r-- | servers/fpga_server_lin/src/fpga_conn.cpp | 13 |
2 files changed, 26 insertions, 3 deletions
diff --git a/servers/fpga_server_lin/src/bbb-gpmc-init.cpp b/servers/fpga_server_lin/src/bbb-gpmc-init.cpp index 961c560..be495a3 100644 --- a/servers/fpga_server_lin/src/bbb-gpmc-init.cpp +++ b/servers/fpga_server_lin/src/bbb-gpmc-init.cpp @@ -106,12 +106,22 @@ void gpmc_setup(void) { // disable before playing with the registers *(gpmc + displacement + GPMC_CONFIG7) = 0x00000000; +// *(gpmc + displacement + GPMC_CONFIG) = 0x00000000; // Unlimited address space +// *(gpmc + displacement + GPMC_CONFIG1) = 0x00000000; // No burst, async, 8-bit, non multiplexed +// *(gpmc + displacement + GPMC_CONFIG2) = 0x00001000; // Assert CS on fclk0, deassert CS on fclk16 +// *(gpmc + displacement + GPMC_CONFIG3) = 0x00000400; // Assert ADV on fclk 0, deassert ADV on fclk 4 +// *(gpmc + displacement + GPMC_CONFIG4) = 0x0c041004; // Assert WE on fclk4, deassert WE on fclk12, assert OE on fclk4, deassert OE on fclk16 +// *(gpmc + displacement + GPMC_CONFIG5) = 0x000c1010; // Data valid on fclk 12, cycle time 16 fclks +// *(gpmc + displacement + GPMC_CONFIG6) = 0x00000000; // No back to back cycle restrictions +// *(gpmc + displacement + GPMC_CONFIG7) = 0x00000e50; // CS0: Set base address 0x10000000, 32MB region, and enable CS + + // Use slower clocking to reduce errors in wire nest prototype *(gpmc + displacement + GPMC_CONFIG) = 0x00000000; // Unlimited address space *(gpmc + displacement + GPMC_CONFIG1) = 0x00000000; // No burst, async, 8-bit, non multiplexed - *(gpmc + displacement + GPMC_CONFIG2) = 0x00001000; // Assert CS on fclk0, deassert CS on fclk16 + *(gpmc + displacement + GPMC_CONFIG2) = 0x00001f00; // Assert CS on fclk0, deassert CS on fclk31 *(gpmc + displacement + GPMC_CONFIG3) = 0x00000400; // Assert ADV on fclk 0, deassert ADV on fclk 4 - *(gpmc + displacement + GPMC_CONFIG4) = 0x0c041004; // Assert WE on fclk4, deassert WE on fclk12, assert OE on fclk4, deassert OE on fclk16 - *(gpmc + displacement + GPMC_CONFIG5) = 0x000c1010; // Data valid on fclk 12, cycle time 16 fclks + *(gpmc + displacement + GPMC_CONFIG4) = 0x1f041f04; // Assert WE on fclk4, deassert WE on fclk31, assert OE on fclk4, deassert OE on fclk31 + *(gpmc + displacement + GPMC_CONFIG5) = 0x00101f1f; // Data valid on fclk 16, cycle time 31 fclks *(gpmc + displacement + GPMC_CONFIG6) = 0x00000000; // No back to back cycle restrictions *(gpmc + displacement + GPMC_CONFIG7) = 0x00000e50; // CS0: Set base address 0x10000000, 32MB region, and enable CS diff --git a/servers/fpga_server_lin/src/fpga_conn.cpp b/servers/fpga_server_lin/src/fpga_conn.cpp index a20cad9..e17f134 100644 --- a/servers/fpga_server_lin/src/fpga_conn.cpp +++ b/servers/fpga_server_lin/src/fpga_conn.cpp @@ -369,6 +369,9 @@ void FPGASocket::commandLoop() { if (m_stateImageRXCounter >= dsp_ram_size) { m_stateImageRXRequested = false; m_stateImageTXRequested = true; + + // Start user processing + write_gpmc(0x0a, read_gpmc(0x0a) | 0x01); } } else { @@ -398,6 +401,16 @@ void FPGASocket::commandLoop() { write_gpmc(0x05, buffer[read_offset+4]); read_offset = read_offset + 6; } + else if (buffer[read_offset+0] == 'R') { + write_gpmc(0x0c, read_gpmc(0x0c) | 0x01); + usleep(100); + write_gpmc(0x0c, read_gpmc(0x0c) & ~0x01); + read_offset = read_offset + 2; + } + else { + printf("[WARNING] Received invalid command '%c' from client! Dazed and confused, but continuing...\n", buffer[read_offset+0]); + read_offset = read_offset + 2; + } } if (m_stateImageTXRequested) { m_stateImageTXRequested = false; |