diff options
| author | Timothy Pearson <kb9vqf@pearsoncomputing.net> | 2014-01-10 02:58:51 -0600 |
|---|---|---|
| committer | Timothy Pearson <kb9vqf@pearsoncomputing.net> | 2014-01-10 02:58:51 -0600 |
| commit | 37420cfb78718d7a7ac9bfde754fbd62c6d29f2c (patch) | |
| tree | be4c7467e1ed3d1e12c8f5ce7d054758880440ca /fpga/gpmc/xilinx/common/main.v | |
| parent | 4436bddc8ceecb5277de73de6c929a3bb6722143 (diff) | |
| download | ulab-37420cfb78718d7a7ac9bfde754fbd62c6d29f2c.tar.gz ulab-37420cfb78718d7a7ac9bfde754fbd62c6d29f2c.zip | |
Increase DSP memory size
Fix potential crash in FPGA viewer if hardware debug interface is malfunctioning or offline
Diffstat (limited to 'fpga/gpmc/xilinx/common/main.v')
| -rw-r--r-- | fpga/gpmc/xilinx/common/main.v | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/fpga/gpmc/xilinx/common/main.v b/fpga/gpmc/xilinx/common/main.v index 370c3a2..a54de0d 100644 --- a/fpga/gpmc/xilinx/common/main.v +++ b/fpga/gpmc/xilinx/common/main.v @@ -53,7 +53,7 @@ module main( input [3:0] sseg_mux, input [7:0] sseg_data); - parameter RAM_ADDR_BITS = 14; + parameter RAM_ADDR_BITS = 15; reg [15:0] sixteen_bit_io_in; reg [15:0] sixteen_bit_io_out; @@ -309,6 +309,7 @@ module main( // 0x0a: User process register // Bit 0: User processing start // Bit 1: User processing done (read only) + // 0x0b: Number of address bits of DSP RAM (read only) // 0x20 - 0x3f: LCD data area if (gpmc_wen_reg == 1'b0) begin if (gpmc_address_reg[(RAM_ADDR_BITS-1):5] == 1) begin // Address range 0x20 - 0x3f @@ -380,6 +381,9 @@ module main( gpmc_data_out[1] = userproc_done; gpmc_data_out[7:2] = 0; end + 11: begin + gpmc_data_out = RAM_ADDR_BITS; + end default: begin gpmc_data_out = 0; end |